I'm not an expert in this stuff, but I think they just get thrown away.
It's one of several reasons why smaller chips are more area-efficient to make, and one of several reasons why the major semiconductor manufacturers have been so interested lately in building chips out of smaller pieces manufactured separately rather than one big monolithic chip.
Even dumber question, why do they need to be circular?
CDs and DVDs write in a circular pattern starting from the middle going outwards, but the actual chips on these wafers seem to be their own individual squares.
Because of the process used to make the initial cylindrical crystal from which the wafers are sliced: https://en.wikipedia.org/wiki/Boule_(crystal) It involves spinning a seed crystal and drawing a cylinder out of a bath of molton ultra-pure silicon. Spinning => cylinder => circular wafers. To reduce waste of the "edge bits" the industry has moved over time to larger and larger wafers. I have some wafers from the 90s which are 6" and 8" in diameter (amazing what you can buy on eBay), but modern ones are all 12" (actually 300mm).
I would guess that dies are built from modular sections (e.g. SRAM cells), and it’s important that two identical modules perform identically - signal propagation time is relevant at this scale, so the shape and layout of each module must be identical. I would further guess that rectangular layouts are easiest to reason about, easiest to make masks for, easiest to pack efficiently at the transistor level, and easiest to test.
But I don’t know of a fundamental reason why a sufficiently advanced VHDL “compiler” couldn’t produce hex-cell or even circular layouts.
Chip dicing hardware can produce hex-cells, or any other cell with straight edges. (Not circular - that's not a good shape to expect from crystalline silicon.)
But - as you say - the modular sections are rectangular, and for most applications there's no good reason to make the dies any other shape.
There's actually a patent for hex-cell chips, but it doesn't seem to have been used for any significant projects.
> Even dumber question, why do they need to be circular?
The wafer is round because it's cut from a cylinder of silicon. And the cylinder is a cylinder because spinning is involved in the process to make it. Hence, thanks to centripetal force, it ends up being round!
>Ribbon solar cells are a 1970s technology most recently sold by Evergreen Solar (which is now in receivership, i.e. bankrupt and liquidated), among other manufacturers.
I'm not sure if they can be 'just' recycled into new wafers. Either way, given that it's just silicon I'm sure it can be recycled or safely disposed of (silicon isn't toxic as far as I know, unless you breathe it in a powder form)
Not sure how easy it would be to recycle those as chips, given it will have dopants [1] inside. It will likely be unfit for computing applications unless purified, but since it's on the order of one dopant atom per 1e12 silicon atoms, it would basically be 100% pure in other industries.
Some metallic contacts (mostly aluminium), silicon oxide and other residues are likely present as well, depending on the masking process.
I've wondered for quite some time why not triangles or hexagons. I guess the yield (percentage of wafer thrown away) improvements would be minimal. Plus, the temperature is often better controlled at the center, which would make the edge parts less performant anyway.
That's the other advantages of chiplet design: maximize yield (a small defect renders a much smaller chip unusable), and much more granular binning (easier to sort out good/worse chips, due to placement and random issues during fabrication). Not to mention you have a much more modular design at the end, where you only have to change the cheaper (not 7nm) silicon interposer.
Partly it's "path dependency" - everything is set up for rectangular dies, so everything would need to change for uncertain benefits. Not just the tooling, but also the design software. While I was looking at this I found that Intel has a patent for an octagonal die with a smaller square one fitted in the gaps between: https://patents.google.com/patent/US20060278956
BTW the dicing used (in the 1970s) to be done partly by hand. You can see a video of someone doing it here: https://youtu.be/HW5Fvk8FNOQ?t=978
I know you re probably joking, but please mind Poe's law.
For the uninitiated, yeah, some dies can die during dicing. But I think you'd have trouble finding the cracks, and then it's just infeasible to precisely cut both halves where they would need to be cut, then reattach them. The issues would be the cut thickness, not damaging the circuits near it, precisely aligning the circuits, and then electrically connecting the circuits.
Alignment is probably the hardest part, we can barely do it for flip-chip wafers/silicon interposers on the order of the µm, imagine doing it at less than 7nm, which is the transistor pitch here.
I think they do sometimes put test features in the corners if there's space. The electrical properties of the die can vary in interesting ways [1], but the edges are usually worse than the center.
So, the main result of designing a CPU is a series of masks that essentially indicate where to put what. For example, in this layer, inject boron anywhere the mask doesn't block. The masks aren't wafer sized- they are pretty small, and a machine moves the mask from position to position across the wafer to re-use it. But, at least when I was working on this, some masks would be larger than an individual square (die)- maybe the mask could do 2x2 at a time. In that case, maybe the application of the mask would get you one complete die, and three die off the edge.
