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To many experts back in the day it was hard to imagine a traditional process below 100nm.


i am not an expert, but this is an elementary physics knowledge.


LOL, yep, they said something similar: "You have to break laws of physics to get under 100nm". When you reach a single atom limit, why can't you start building vertical structures? Moore's law specifies the number of transistors per area, it says nothing about the height of that area. Specifically, you're not restricted to a single layer.


Because:

1. going from 2D to 3D is a one time improvement, not a continuous law that runs for 30 years: at some future point, say a 5nm process becomes 3D, and the number of transistors jumps from N^2 to N^3. That's a single time change.

2. making single atom conventional logic gates is physically impossible: it will have quantum effects and thus will behave like a quantum computer. To make a classical (non-quantum) logic gate, you need at least 8-10 atoms (and that's pushing it).


No, going from 1xN^2 to 2xN^2 to 3xN^2 and each further stacked layer from there on is still going to be a very major challenge (getting rid of heat being a very major physical challenge for a start). We're already 32 x N^2 for flash packages, but with stacked dies. For flash heat is much easier to manage as only a small part of the die is active at any one time. Stacking memory on top of a cpu core is also common practice in mobile SoCs (though still mostly package-on-package). Going to N^3 from todays M x N^2 is squarely (cubedly? ;)) in the realm of science fiction, there's a lot of space for improvement here.




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