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The ESP32 pre-RISCV ISA is from Tensilica, this IP they purchased.


To be clear and towards the OP's comment about ESP32 ISA -- Xtensa isn't really a self contained architecture, it can be customized (extended) by the vendor. The ISA can be extended for these customizations. ESP32 is one customization of it.


It was only opaquely supported by GCC, no LLVM, so no Rust.

It is a cool design, but it was a major PITA for awhile. Xtensa is parametric so every instance of a cpu has a custom instruction set.


Heh. Yep. Reverse engineering firmware for a custom xtensa cpu is also a lot of “fun” (and also fun).




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