Once configured, a FPGA is the hardware that's configured into it. It's cheaper than an ASIC, unless you make a shitton of them.
The newly-made design, be it in FPGA or ASIC form, is not the original MOS chip. But it could indeed behave identically.
ASIC advantages such as lower power consumption and higher achievable clock speeds at a given node, are advantages relative to the FPGA. Not advantages relative to the original MOS chip, which dirt cheap FPGAs can vastly outdo, and only need to match for the purpose.
The newly-made design, be it in FPGA or ASIC form, is not the original MOS chip. But it could indeed behave identically.
ASIC advantages such as lower power consumption and higher achievable clock speeds at a given node, are advantages relative to the FPGA. Not advantages relative to the original MOS chip, which dirt cheap FPGAs can vastly outdo, and only need to match for the purpose.