> I also recall reading a paper that got into implementing a GC on silicon for a graph rewriting based architecture
Not that, but still interesting: the Intel iAPX 432[0] was a (failed) processor from 1981 designed with high level languages in mind (specifically Ada). It supported bit-level aligned, variable length instruction, but also a built in GC and type tagging system.
Not that, but still interesting: the Intel iAPX 432[0] was a (failed) processor from 1981 designed with high level languages in mind (specifically Ada). It supported bit-level aligned, variable length instruction, but also a built in GC and type tagging system.
[0]: https://en.wikipedia.org/wiki/Intel_iAPX_432