I'm also a fan of Itanium. Instruction encoding is a bit weird (41 bits, really?), but many cool ideas to give the compiler more control.
My point was that if microcode were the same as simply expanding CISC instructions into multiple RISC instructions, Intel could have gotten away with designing a RISC chip that was performant on x86 by simply expanding each x86 instruction into the new architecture.
The performance of x86 on Itanium wasn't too great (and was one of the reasons it didn't do so well).
My point was that if microcode were the same as simply expanding CISC instructions into multiple RISC instructions, Intel could have gotten away with designing a RISC chip that was performant on x86 by simply expanding each x86 instruction into the new architecture.
The performance of x86 on Itanium wasn't too great (and was one of the reasons it didn't do so well).